UPC | Westmere | InterNode | Performance | Network-Based Computing Laboratory
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Experimental Testbed:
Each node of our testbed has eight cores (2.53 GHz dual quad-core)
and 12 GB main memory. The CPUs based on Westmere architecture and
run in 64 bit mode. The nodes support MT26428 QDR ConnectX HCAs
(36 Gbps data rate) with PCI-Ex Gen2 interfaces and are interconnected
over 171-port Mellanox QDR switch.
The operating system used was RedHat Enterprise Linux Server release
5.4 (Tikanga). The processes were bound to core 1 on both nodes.
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MVAPICH2-X currently delivers
UPC put latency of 0.41 microseconds for 4
bytes,
UPC get latency of 1.83 microseconds for 4
bytes.