MVAPICH/MVAPICH2 Project
Ohio State University



UPC | Sandy Bridge | IntraNode | Performance | Network-Based Computing Laboratory

Intra-node performance numbers of MVAPICH2-X on Sandy Bridge Architecture (11/08/13)

  • Experimental Testbed: Each node of our testbed has two 8-core 2.6 GHz Intel Xeon E5-2670 (Sandy Bridge) processors and 32 GB main memory. The nodes support 16x PCI Express Gen3 interfaces and are equipped with Mellanox ConnectX FDR HCAs with PCI Express Gen3 interfaces. The operating system used was CentOS release 6.3 (kernel version 2.6.32-279.el6). The processes were bound to core 1 and core 2.
  • MVAPICH2-X currently delivers UPC put latency of 0.12 microseconds for 4 bytes, UPC get latency of 0.01 microseconds for 4 bytes.