MVAPICH/MVAPICH2 Project
Ohio State University



UPC | Sandy Bridge | InterNode | Performance | Network-Based Computing Laboratory

Performance numbers of MVAPICH2-X on Sandy Bridge Architecture (11/08/13)

  • Experimental Testbed: Each node of our testbed has two 8-core 2.6 GHz Intel Xeon E5-2670 (Sandy Bridge) processors and 32 GB main memory. The nodes support 16x PCI Express Gen3 interfaces and are equipped with Mellanox ConnectX-3 FDR HCAs with PCI Express Gen3 interfaces. The operating system used was CentOS release 6.3 (kernel version 2.6.32-279.el6). The processes were bound to core 1 on both nodes
  • MVAPICH2-X currently delivers UPC put latency of 1.47 microseconds for 4 bytes, UPC get latency of 1.78 microseconds for 4 bytes.