MVAPICH/MVAPICH2 Project
Ohio State University



Magny Cours | InterNode | Performance | Network-Based Computing Laboratory

Performance numbers of MVAPICH2 on Magny Cours Architecture (05/06/13)

  • Experimental Testbed: Each node of our testbed has 24 AMD Opteron 6174 processors running at 2.2 GHz with 512 KB L2 cache. Each node also has 32 Gigabyte memory, x8 PCI Express Gen2 interfaces and Mellanox ConnectX-2 QDR HCAs with PCI Express interfaces in multi-rail configuration. The nodes are connected using a 36 port Mellanox QDR InfiniBand switch with QSFP ports. The operating system used was Red Hat Enterprise Linux Server release 5.5 (Tikanga).
  • MVAPICH2 currently delivers one-sided put latency of 2.55 microseconds for 4 bytes, one-sided get latency of 4.67 microseconds for 4 bytes, one-sided put bandwidth up to 2876.75 Million Bytes/sec, one-sided get bandwidth up to 2888.78 Million Bytes/sec and put bidirectional bandwidth upto 5317.77 Million Bytes/sec on the above testbed. (1 Mega Byte = 1,048,576 Bytes; 1 Million Byte = 1,000,000 Bytes)